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Built without FMA contraction.","math":["\\begin{aligned} s_c &\\leftarrow \\big(s_{c,2}, \\dots, s_{c,w},\\, x_{t,c}\\big), \\qquad u_{t,c} = \\operatorname{silu}\\Big(b_c + \\textstyle\\sum_{i=1}^{w} W_{c,i}\\, s_{c,i}\\Big) \\\\ y_{t,c} &= \\begin{cases} u_{t,c}\\,\\Big(\\sum_{j \\in \\mathcal{H}(c)} u_{t,j}^2 + \\epsilon\\Big)^{-1/2} & c < c_{qk} \\\\ u_{t,c} & c \\ge c_{qk} \\end{cases} \\end{aligned}","\\text{where } \\mathcal{H}(c) \\text{ is the } d_k\\text{-channel q or k head containing } c,\\ c_{qk} \\text{ the number of q and k channels},\\ s_c \\in \\mathbb{R}^{w} \\text{ the window (oldest first)}","\\text{token form: } s^{(t)}_{c,i} = x_{t-w+i,\\,c} \\text{ for } i = 1,\\dots,w, \\text{ with } x_{j,c} \\text{ for } j \\le 0 \\text{ read from the stored window slot } j + w"]},"dense_bf16":{"description":"BF16 GEMV (1 row), batched GEMV (M <= 16 per block row) and GEMM (any M)","about":"Dense BF16 projection on CUDA cores, $y_{tn}=\\sum_k W_{nk}x_{tk}$ for $t<m$ rows, with $W\\in\\mathbb{R}^{N\\times K}$ row-major. The one-row GEMV dense_gemv_bf16 gives every output 64 threads (two warps) and packs four outputs into a 256-thread block; each thread walks K in 8-element vectors $v = l, l+64, \\dots$, the warps reduce by shuffle and the two warp partials are added. The batched GEMVs (dense_gemv_bf16_batchm for up to 16 rows per block row with the rows staged in shared memory, its unrolled _wide entries for 9 to 16 rows, and dense_gemv_bf16_batchm_few for 2 to 8 rows with up to eight K slabs of weight loads in flight, the _pair entry running two projections in one launch) read each weight vector once for all rows and repeat the one-row operation order, so every row is bit-identical to dense_gemv_bf16. For larger M, dense_gemm_bf16 is a 16 x 16 shared-memory tile with one thread per output and dense_gemm_bf16_router a 16 x 64 register-blocked tile (four columns per thread) used for the MoE router; the fp32out and f32out variants store the FP32 sum without rounding.","numerics":"BF16 weights and activations are widened exactly to FP32 and multiplied and added as separate correctly rounded FP32 operations (the build disables FMA contraction), in the fixed order shown; the only narrowing is one round-to-nearest-even to BF16 at the store, which the FP32-output variants skip.","math":["\\begin{aligned} y_{tn} &= \\mathrm{rn}_{\\mathrm{bf16}}\\big(P^{(0)}_{tn} + P^{(1)}_{tn}\\big), \\qquad P^{(w)}_{tn} = \\sum_{l=32w}^{32w+31}\\;\\sum_{v \\equiv l \\pmod{64}}\\;\\sum_{i=0}^{7} x_{t,8v+i}\\,W_{n,8v+i} \\quad \\text{(GEMV)} \\\\ y_{tn} &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\sum_{k=0}^{K-1} x_{tk}\\,W_{nk}\\Big) \\quad \\text{(tiled GEMM, sequential in } k\\text{)} \\end{aligned}"]},"dsa_indexer":{"description":"DSA lightning indexer: key store, pool compression, scores, top pools, token expansion","about":"The DeepSeek-sparse-attention lightning indexer, which picks the tokens each query row attends. Stage by stage: a store writes the row's normalised index key $k_s \\in \\mathbb{R}^{128}$ and per-channel gate $g_s$ into the indexer cache; pool compression folds every $K_P=4$ consecutive tokens into one pool key by a per-channel softmax over the pool's slots of gate plus a learned position term; the scores combine $H_I=32$ index heads as a weighted sum of ReLU dot products against each pool key, with pools that are incomplete or end after the query scored $-\\infty$; a deterministic top-k keeps the best $\\min(P, 2048/K_P)=512$ pools (score descending, ties to the lower pool index); expansion writes the selected pools' token ids and always appends the up to $K_P-1$ visible tokens of the incomplete tail pool, padding with $-1$. Kernels cover one sequence or many rows per launch with device-side geometry (graph replay safe), block-, warp- and lane-per-head score forms over scratch or persisted pool keys, a BF16 tensor-core score path with a cp.async key pipeline, bitonic, radix and multi-CTA radix top-k, a fused scores-plus-streaming-top-k kernel, a candidacy fold for the sequence-parallel selection, and an FP8 indexer cache that stores each completed pool key Walsh-Hadamard rotated in E4M3 with a power-of-two scale.","numerics":"Keys and gates are BF16 widened to FP32; pool keys, queries, head weights and scores are FP32, with __expf in the pool softmax, FP32 lane-strided dot products reduced by a shuffle tree and the head terms summed in head order, no FMA contraction. The tensor-core score path rounds queries and pool keys to BF16 (RNE) and accumulates in FP32 (a different precision point); the FP8 cache quantises $y=\\mathrm{FWHT}_{128}(\\bar k)$ with scale $2^{\\lceil \\log_2(\\max|y|/448)\\rceil}$ (exponent clamped to $[-126,127]$) and saturating RNE E4M3, and reads back $\\mathrm{FWHT}_{128}(\\hat y\\, s)/128$; all top-k variants implement one total order and emit identical slots for NaN-free scores.","math":["\\begin{aligned} \\bar k_{p,c} &= \\sum_{s=0}^{K_P-1} \\frac{\\exp\\big(g_{pK_P+s,c} + a_{s,c}\\big)}{\\sum_{s^\\prime} \\exp\\big(g_{pK_P+s^\\prime,c} + a_{s^\\prime,c}\\big)}\\; k_{pK_P+s,c} \\\\ I_{t,p} &= \\begin{cases} \\displaystyle\\sum_{h=1}^{H_I} w_{t,h}\\, \\operatorname{relu}\\!\\Big(\\tfrac{1}{\\sqrt{D_I}}\\,\\langle q_{t,h}, \\bar k_p\\rangle\\Big) & \\text{if } (p+1)K_P \\le S \\text{ and } pK_P + K_P - 1 \\le \\tau_t \\\\ -\\infty & \\text{otherwise} \\end{cases} \\end{aligned}","\\begin{aligned} \\mathcal{P}_t &= \\operatorname{top}_{k_t}\\big(I_{t,\\cdot}\\big), \\qquad k_t = \\min\\Big(\\Big\\lfloor \\tfrac{\\tau_t+1}{K_P} \\Big\\rfloor,\\, \\Big\\lfloor \\tfrac{\\min(S, 2048)}{K_P} \\Big\\rfloor\\Big) \\\\ \\mathcal{T}_t &= \\{\\, pK_P + s : p \\in \\mathcal{P}_t,\\ 0 \\le s < K_P \\,\\} \\,\\cup\\, \\{\\, K_P \\lfloor n_t / K_P \\rfloor + s : 0 \\le s < n_t \\bmod K_P \\,\\} \\end{aligned}","\\begin{aligned} y &= \\mathrm{FWHT}_{128}(\\bar k_p), \\qquad \\sigma_p = 2^{\\lceil \\log_2(\\max_c |y_c| / 448) \\rceil}, \\qquad \\hat y_c = \\mathrm{sat}_{\\mathrm{e4m3}}\\big(y_c / \\sigma_p\\big) \\\\ \\tilde k_p &= \\tfrac{1}{128}\\,\\mathrm{FWHT}_{128}\\big(\\sigma_p\\, \\hat y\\big) \\end{aligned}","\\text{where } w_{t,h} = H_I^{-1/2}\\,(W_w x_t)_h,\\ a \\text{ the learned slot term, } D_I = 128,\\ S \\text{ the cached tokens, } \\tau_t \\text{ the query position, } n_t \\text{ the visible tokens at or before } \\tau_t"]},"embed_copy":{"description":"Embedding rows copied device-to-device per row (no kernel)","about":"No kernel launches in this family. Before the step's program runs, the engine embeds each token by copying row $\\mathrm{tok}_t$ of the BF16 embedding table $E \\in \\mathbb{R}^{V \\times d}$ into row $t$ of the hidden-state buffer, one device-to-device copy per row, so the output of the group is the buffer those copies land in. A model whose configuration declares an embedding scale multiplies the rows afterwards in a separate step that is not part of this family.","numerics":"Pure data movement: the BF16 table row is copied byte for byte, with no widening, arithmetic or rounding.","math":["h_t = E_{\\mathrm{tok}_t,\\,:} \\in \\mathbb{R}^{d}, \\qquad t = 1,\\dots,m, \\qquad E \\in \\mathbb{R}^{V \\times d}"]},"glm_mhc":{"description":"GLM-5 hyper-connection: mix GEMV, Sinkhorn pre-mix and collapse, post-mix, expand, mean","about":"Manifold-constrained hyper-connections: the residual is carried as $n_{hc}=4$ FP32 streams $x_1,\\dots,x_{n_{hc}} \\in \\mathbb{R}^{d}$ ($d=4096$), and every attention or FFN site reads one collapsed BF16 row from them and writes its output back into all of them. The pre-mix takes the RMS of the flattened streams, a GEMV with the site's mixing matrix $\\Phi \\in \\mathbb{R}^{(2+n_{hc})n_{hc} \\times n_{hc}d}$ (24 rows: $n_{hc}$ pre gates, $n_{hc}$ post gates and an $n_{hc}\\times n_{hc}$ comb matrix), sigmoid gates and a Sinkhorn normalisation of the comb matrix ($T=20$ iterations, ending on a column pass), then collapses the streams with the pre gates; the post-mix writes $\\mathrm{post}_j\\,u + \\sum_i C_{ij}\\,x_i$ back into each stream. Variants: the mix as one block per (token, mix row) with FP32 or BF16 weights and a separate finish kernel; fused pre-mix entries (glm5next_mhc_fused::glm5next_hc_pre_norm and its row-grouped, prefetching, split-K, four-token, cp.async-tiled and small-batch forms) that also run the site's RMSNorm on the collapsed row through a last-block-done tail; post-mix entries that first sum the tensor-parallel ranks' partial outputs (one-shot all-reduce reduce step), one of them fused with the next site's pre-mix; the embedding broadcast (expand) and the final unweighted stream mean (head).","numerics":"Streams, mixes, gates and comb are FP32 (BF16 mixing weights are widened exactly); every dot product is a thread-strided FP32 sum followed by a fixed 256-wide tree, built without FMA contraction, so all variants except split-K (which reorders the mix sums) give identical bits. expf (not the fast intrinsic) for sigmoid and softmax, rsqrtf for the RMS, every Sinkhorn step a true division by $(\\text{sum}+\\varepsilon_{hc})$; the collapsed row and the normed row are each rounded once to BF16 (RNE), the rank sum is an FP32 sum in rank order rounded once to BF16 before the post-mix, and the post-mix output stays FP32.","math":["\\begin{aligned} r &= \\Big(\\tfrac{1}{n_{hc}d}\\textstyle\\sum_{i,k} x_{i,k}^2 + \\varepsilon_n\\Big)^{-1/2}, \\qquad \\mu_m = r\\,\\langle \\Phi_m, [x_1;\\dots;x_{n_{hc}}]\\rangle,\\quad m = 1,\\dots,(2+n_{hc})n_{hc} \\\\ \\mathrm{pre}_i &= \\sigma(\\alpha_0\\,\\mu_i + \\beta_i) + \\varepsilon_{hc}, \\qquad \\mathrm{post}_i = 2\\,\\sigma(\\alpha_1\\,\\mu_{n_{hc}+i} + \\beta_{n_{hc}+i}) \\\\ C^{(0)}_{ij} &= \\operatorname{softmax}_j\\big(\\alpha_2\\,\\mu_{2n_{hc}+(i-1)n_{hc}+j} + \\beta_{2n_{hc}+(i-1)n_{hc}+j}\\big) + \\varepsilon_{hc} \\end{aligned}","\\begin{aligned} \\mathcal{C}(C)_{ij} &= \\frac{C_{ij}}{\\varepsilon_{hc} + \\sum_{i^\\prime} C_{i^\\prime j}}, \\qquad \\mathcal{R}(C)_{ij} = \\frac{C_{ij}}{\\varepsilon_{hc} + \\sum_{j^\\prime} C_{ij^\\prime}} \\\\ C &= (\\mathcal{C}\\circ\\mathcal{R})^{T-1}\\big(\\mathcal{C}(C^{(0)})\\big) \\\\ y &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\textstyle\\sum_{i=1}^{n_{hc}} \\mathrm{pre}_i\\, x_i\\Big), \\qquad \\hat y_k = \\mathrm{rn}_{\\mathrm{bf16}}\\Big(y_k \\big(\\tfrac{1}{d}\\textstyle\\sum_{k^\\prime} y_{k^\\prime}^2 + \\epsilon\\big)^{-1/2} \\gamma_k\\Big) \\end{aligned}","\\begin{aligned} u &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\textstyle\\sum_{\\rho=0}^{R-1} u^{(\\rho)}\\Big), \\qquad x^\\prime_j = \\mathrm{post}_j\\, u + \\textstyle\\sum_{i=1}^{n_{hc}} C_{ij}\\, x_i \\\\ x_i &= h \\;\\; (i = 1,\\dots,n_{hc}) \\;\\;\\text{(expand)}, \\qquad y = \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\big(\\textstyle\\sum_{i} x_i\\big)\\cdot\\tfrac{1}{n_{hc}}\\Big) \\;\\;\\text{(head)} \\end{aligned}","\\text{where } \\alpha_{0,1,2} \\text{ are the site scales, } \\beta \\text{ the mix biases, } \\gamma \\text{ the plain RMSNorm weight, } u^{(\\rho)} \\text{ the partial sublayer output of rank } \\rho \\text{, } h \\text{ the BF16 embedding, } \\varepsilon_n, \\varepsilon_{hc} = 10^{-6}, \\epsilon \\text{ the stream-norm, hyper-connection and RMSNorm epsilons, } T = 20"]},"glm_mla_decode":{"description":"GLM-5 sparse NoPE MLA decode over an FP8 latent cache (latent 512)","about":"Sparse multi-head latent attention for GLM-5 in its absorbed NoPE form: there is no rotary part, each cached token is its 512-wide latent row $c_s$ (keys and values are the same latent), and each head's query $q_h \\in \\mathbb{R}^{512}$ already carries the key up-projection, the value up-projection being applied afterwards in the output projection. One CTA of 16 warps runs per (head, row); the warps split the row's selection list (the indexer's token ids, $-1$ or out-of-range entries skipped, duplicates attended twice), gather four selected tokens at a time through the block table from the paged FP8 cache, and keep a per-warp online softmax, merged across warps in a shared-memory tree. A row with no valid token writes zeros.","numerics":"Queries BF16 widened to FP32; cache bytes are E4M3 decoded exactly to FP32 and multiplied by the static per-layer scale $s_k$ (1.0 for this checkpoint). FP32 lane partials reduced by a warp butterfly, softmax scale $512^{-1/2}$, __expf for every exponential, FP32 output accumulation, no FMA contraction; one RNE rounding to BF16 of $o/\\ell$ at the store.","math":["\\begin{aligned} z_{h,j} &= \\frac{1}{\\sqrt{512}}\\,\\big\\langle q_h,\\; s_k\\,\\hat c_{j}\\big\\rangle, \\qquad j \\in \\mathcal{T}_t \\\\ o_h &= \\mathrm{rn}_{\\mathrm{bf16}}\\Bigg(\\frac{\\sum_{j \\in \\mathcal{T}_t} e^{\\,z_{h,j} - m_h}\\, s_k\\, \\hat c_j}{\\sum_{j \\in \\mathcal{T}_t} e^{\\,z_{h,j} - m_h}}\\Bigg), \\qquad m_h = \\max_{j} z_{h,j} \\end{aligned}","\\begin{aligned} m^\\prime &= \\max(m, z), \\quad \\ell^\\prime = \\ell\\, e^{m - m^\\prime} + e^{z - m^\\prime}, \\quad o^\\prime = o\\, e^{m - m^\\prime} + e^{z - m^\\prime}\\, v \\\\ (m,\\ell,o)_{a \\oplus b} &= \\Big(m^\\ast,\\; \\ell_a e^{m_a - m^\\ast} + \\ell_b e^{m_b - m^\\ast},\\; o_a e^{m_a - m^\\ast} + o_b e^{m_b - m^\\ast}\\Big), \\quad m^\\ast = \\max(m_a, m_b) \\end{aligned}","\\text{where } \\hat c_j \\in \\mathrm{E4M3}^{512} \\text{ is cached token } j,\\ s_k \\text{ the cache scale, } \\mathcal{T}_t \\text{ the indexer selection of row } t"]},"glm_mla_latent_write":{"description":"GLM-5 latent cache write: RMSNorm + FP8 quantisation + paged store","about":"Writes one token's MLA latent into the paged FP8 latent cache: the BF16 kv_a projection row $c \\in \\mathbb{R}^{512}$ is RMS-normalised with GLM's plain weight (no $1+\\gamma$ offset), multiplied by the reciprocal cache scale and stored as E4M3 at its slot. One block of exactly 512 threads per token (one thread per latent channel); the sum of squares is a warp butterfly followed by a cross-warp reduction; a slot of $-1$ skips the token. There is no rotary part, since GLM-5 latent attention is NoPE with one latent head.","numerics":"BF16 input widened to FP32; FP32 sum of squares (warp shuffle tree, then a tree over the 16 warp sums), rsqrtf, products $(c_i r)\\gamma_i$ then times $1/s_k$ in FP32 without FMA contraction; a single saturating round-to-nearest-even conversion to E4M3 with no intermediate BF16 rounding. The scale is a static per-layer value supplied by the host (1.0 for this checkpoint), not computed from the row.","math":["\\begin{aligned} r &= \\Big(\\frac{1}{512}\\sum_{k=1}^{512} c_k^2 + \\epsilon\\Big)^{-1/2} \\\\ \\hat c_i &= \\mathrm{sat}_{\\mathrm{e4m3}}\\Big(\\big(c_i\\, r\\, \\gamma_i\\big)\\cdot \\frac{1}{s_k}\\Big), \\qquad i = 1,\\dots,512 \\end{aligned}","\\text{where } \\gamma \\text{ is the kv\\_a RMSNorm weight, } \\epsilon = 10^{-5},\\ s_k \\text{ the static cache scale read back by the decode kernels}"]},"glm_moe_combine":{"description":"Weighted routed sum plus the ungated shared expert","about":"Combines a token's MoE output: the $k$ routed expert outputs weighted by the router weights (which already include the routed scaling factor) plus the shared expert's output added unscaled, since GLM-5's shared expert has no gate. Grid of (token, column blocks), threads striding the hidden dimension; the indexed variants read routed slot $k$ of token $t$ from its expert-sorted row through a token-to-permutation map instead of from slot order, and the vec8 variants own eight consecutive elements per thread with 16-byte loads, all producing the same bytes.","numerics":"BF16 expert and shared outputs widened to FP32, FP32 weights; one FP32 accumulator starting at zero summed over the slots in slot order with each product rounded before its add (no FMA contraction), then the shared value added, then a single RNE rounding to BF16.","math":["y_{t,i} = \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\Big(\\sum_{\\kappa=1}^{k} w_{t,\\kappa}\\, e^{(\\kappa)}_{t,i}\\Big) + e^{\\mathrm{sh}}_{t,i}\\Big)","\\text{where } e^{(\\kappa)}_t \\text{ is the output of the expert in routed slot } \\kappa,\\ w_{t,\\kappa} \\text{ its router weight, } e^{\\mathrm{sh}}_t \\text{ the shared expert output}"]},"glm_router_topk":{"description":"Sigmoid + correction-bias top-k routing over FP32 logits","about":"Noaux top-k routing for GLM-5's 288-expert MoE from FP32 router logits, one block per token: each expert's score is the sigmoid of its logit, experts are ranked by score plus the learned correction bias, and the top $k=8$ are taken (exact ties to the lower expert id); the bias is used for selection only, and the weights are the unbiased sigmoid scores, renormalised over the selected experts and multiplied by the routed scaling factor $\\gamma_r=2.5$. glm5next_ffn::glm5next_router_topk does $k$ rounds of block-wide argmax; glm5next_ffn::glm5next_router_topk_rank produces the same ids and weights byte for byte by ranking within each run of 32 experts with warp shuffles, keeping at most $k$ per run and counting the kept experts ahead of each one. A slot no expert fills gets id $-1$ and weight 0; grouped routing is not used (one group).","numerics":"FP32 throughout: sigmoid as $1/(1+e^{-z})$ with expf, the selection sum $s_e + b_e$, the renormalising sum in slot order, a true division by $(\\sum + 10^{-20})$, then the scale multiply. An optional ladder mode rounds the score, the choice value, the running sum and each weight step to BF16 (RNE) to match a BF16 reference; the default is pure FP32.","math":["\\begin{aligned} s_e &= \\sigma(z_e), \\qquad \\chi_e = s_e + b_e, \\qquad e = 1,\\dots,288 \\\\ \\mathcal{E} &= \\operatorname{top}_k(\\chi) \\;\\;\\text{(descending, ties to the lower } e\\text{)} \\\\ w_{e} &= \\gamma_r\\, \\frac{s_e}{\\sum_{e^\\prime \\in \\mathcal{E}} s_{e^\\prime} + 10^{-20}}, \\qquad e \\in \\mathcal{E} \\end{aligned}","\\text{where } z \\text{ are the router logits, } b \\text{ the correction bias (selection only), } k = 8,\\ \\gamma_r \\text{ the routed scaling factor}"]},"glm_swiglu_clamp":{"description":"Clamped SwiGLU (swiglu_limit): clamp, SiLU and multiply in one pass","about":"GLM-5's clamped SwiGLU activation for the dense, shared-expert and routed FFNs, one thread per element over separate gate and up rows. The clamp is asymmetric: the gate is bounded above only, by the swiglu_limit $L$ (10.0 for this checkpoint, a runtime argument that must be positive), while up is clamped to $[-L, L]$ on both sides; then SiLU of the clamped gate times the clamped up. Three entries: BF16 output, FP32 output, and a BF16-output variant that also zero-fills the routed down projection's accumulation buffer in the same launch.","numerics":"BF16 gate and up widened to FP32; fminf/fmaxf clamps, SiLU computed as $\\hat g/(1+e^{-\\hat g})$ with expf and a true division, product in FP32 without FMA contraction; one RNE rounding to BF16 at the store (none for the FP32-output entry). The same element expression is shared with the fused routed gate/up epilogue, so both round identically.","math":["\\begin{aligned} \\hat g_i &= \\min(g_i, L), \\qquad \\hat u_i = \\min\\big(\\max(u_i, -L), L\\big) \\\\ y_i &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\frac{\\hat g_i}{1 + e^{-\\hat g_i}}\\cdot \\hat u_i\\Big) = \\mathrm{rn}_{\\mathrm{bf16}}\\big(\\operatorname{silu}(\\hat g_i)\\, \\hat u_i\\big) \\end{aligned}","\\text{where } g, u \\text{ are the gate and up projections and } L \\text{ the swiglu\\_limit}"]},"kda_gates_w8a8":{"description":"KDA gate chain: f_b and g_b W8A8 with their activation quantization, the decay and the beta sigmoid, one launch over 1-8 rows","about":"The whole KDA decode gate chain in one launch for 1 to 8 token rows. The low-rank decay and output-gate up-projections $f = W_f x_f$ and $o_g = W_g x_g$ (rank $K = 128$, $N = H d_k$ outputs, FP8 E4M3 weights with one scale per output row) run as two segments of one grid, one 16-row output tile per warp. Each warp quantizes the token rows to E4M3 with a per-row scale in its prologue, issues four $16 \\times 8 \\times 32$ E4M3 MMAs with the tokens in the MMA's 8 columns, and rescales; the bounded-sigmoid decay is the epilogue of the $f$ segment and the beta sigmoid runs on block 0. kda_gates_w8a8_k128 is the one-token entry and kda_gates_w8a8_k128_rows the $1 \\le m \\le 8$ entry; each row's bytes are independent of the others.","numerics":"Activation scale $s_a = \\max(\\max_k |x_k| / 448,\\ 10^{-12})$ per row (an exact max), each value divided by $s_a$, clamped to $\\pm 448$ and converted to E4M3 with round to nearest and saturation. E4M3 by E4M3 products accumulate in FP32 in the tensor core over the full $K = 128$; the result is scaled by $s_w \\cdot s_a$ and rounded to BF16 (RNE), which is the stored $f$ and $o_g$. The decay epilogue widens that BF16 value and uses expf; beta uses __expf; decay and beta are FP32. Built without FMA contraction, so the bytes match the unfused chain.","math":["\\begin{aligned} s_a &= \\max\\!\\Big(\\tfrac{1}{448}\\max_k |x_k|,\\ 10^{-12}\\Big), \\qquad \\hat x_k = \\mathrm{sat}_{\\mathrm{e4m3}}\\big(x_k / s_a\\big) \\\\ f_n &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\big(\\textstyle\\sum_{k=1}^{128} \\hat W_{n,k}\\, \\hat x_k\\big)\\,(s_{w,n}\\, s_a)\\Big) \\\\ g_n &= \\lambda\\, \\sigma\\!\\big(e^{A_{h(n)}}\\,(f_n + \\delta_n)\\big), \\qquad \\beta_h = \\sigma(b_h) \\end{aligned}","\\text{where } \\hat W \\text{ is the E4M3 weight with row scale } s_{w,n},\\ h(n) = \\lfloor n / d_k \\rfloor,\\ \\delta_n \\text{ the per-channel bias},\\ \\lambda < 0 \\text{ the gate lower bound; } o_g \\text{ is computed like } f \\text{ from } x_g, W_g"]},"kda_o_norm":{"description":"KDA output norm: per-head RMSNorm gated by a sigmoid","about":"The KDA output norm: an RMS norm over each head of the FP32 recurrence output, multiplied by the norm weight and by a sigmoid of the BF16 output gate (Gated DeltaNet uses SiLU here). One block per (row, head) of $D = 128$ threads; the sum of squares is a two-level warp shuffle reduction.","numerics":"FP32 input; BF16 gate and weight widened exactly; sum of squares in FP32 by a shuffle-down tree then a second warp reduction; scale rsqrtf(mean + eps); sigmoid via __expf; one BF16 (RNE) rounding at the store.","math":["y_i = \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\frac{o_i}{\\sqrt{\\frac{1}{D}\\sum_{j=1}^{D} o_j^2 + \\epsilon}}\\, \\gamma_i\\, \\sigma(z_i)\\Big)","\\text{where } o \\in \\mathbb{R}^{D} \\text{ is one head of the recurrence output},\\ \\gamma \\text{ the norm weight and } z \\text{ the output gate}"]},"kda_pack":{"description":"KDA q|k|v pack of three projections","about":"Interleaves the three separately projected BF16 rows $q$, $k$, $v$ (each of width $n = H d_k$) into one $[q \\,|\\, k \\,|\\, v]$ row of width $3n$ per token, the layout the depthwise conv reads. One thread per channel and one grid row per token; it is a pure copy.","numerics":"BF16 in and BF16 out; values are copied bit for bit with no arithmetic.","math":["p_{t} = \\big[\\, q_t \\;\\; k_t \\;\\; v_t \\,\\big] \\in \\mathbb{R}^{3n}, \\qquad p_{t,j} = q_{t,j},\\ p_{t,n+j} = k_{t,j},\\ p_{t,2n+j} = v_{t,j}"]},"kda_recurrent":{"description":"KDA gated delta rule with per-channel decay, one token per launch; up to 4 tokens of one sequence with per-token state snapshots (seq_reg_snap)","about":"The Kimi Delta Attention recurrence: the gated delta rule with a per-key-channel decay $\\operatorname{diag}(e^{g_t})$ instead of a scalar, for one head with $d_k = d_v = D = 128$ and an FP32 state $S \\in \\mathbb{R}^{D \\times D}$ updated in place. Grid over heads, one thread per value column: pass one decays the column and forms $S^\\top k$, pass two adds the delta-rule correction and reads out with the pre-scaled query. kda_recurrent_decode_bf16 reads and writes the column in global memory in both passes, _smem keeps the decayed column in shared memory between passes, and _seq_reg keeps it in registers. kda_recurrent_decode_bf16_seq_reg_snap steps $T \\le 4$ tokens of one sequence with the column held in registers across tokens and stores the state after each of the first $T-1$ tokens, the snapshots a $T$-row speculative verify needs to roll back.","numerics":"BF16 q, k, v widened exactly; FP32 log decay, beta, state and output. The decay is applied as expf of the log decay, the query is multiplied by the scale $1/\\sqrt{D}$ (computed on the host in FP32) before the dot product, and both column sums run over $k = 1..D$ in order in FP32 without FMA contraction. All variants and the multi-token kernel give the per-token kernel's bits; no state clamp.","math":["\\begin{aligned} \\tilde S &= \\operatorname{diag}\\!\\big(e^{g_t}\\big)\\, S_{t-1} \\\\ u_t &= \\beta_t\\,\\big(v_t - \\tilde S^\\top k_t\\big) \\\\ S_t &= \\tilde S + k_t\\, u_t^\\top \\\\ o_t &= S_t^\\top \\Big(\\frac{q_t}{\\sqrt{D}}\\Big) \\end{aligned}","\\text{where } g_t \\in \\mathbb{R}^{D} \\text{ is the per-channel log decay},\\ \\beta_t = \\sigma(b_t),\\ q_t, k_t \\text{ L2-normalised by the conv; snapshots } S_1, \\dots, S_{T-1} \\text{ in the } T\\text{-token form}"]},"layer_norm":{"description":"BF16 LayerNorm with weight and bias","about":"LayerNorm with weight and bias over BF16 rows $x \\in \\mathbb{R}^{d}$, written in place. One block per row: a first pass reduces the sum for the mean through a shared-memory halving tree, a second pass reduces the squared deviations from that mean, and a third pass normalises, scales and shifts every element.","numerics":"BF16 widened exactly to FP32; both reductions are FP32 per-thread partials followed by a shared-memory halving tree, the variance is the biased two-pass estimate (divided by $d$), the root uses rsqrtf, and each output is rounded once to BF16 (RNE).","math":["\\begin{aligned} \\mu &= \\frac{1}{d}\\sum_{j=1}^{d} x_j, \\qquad v = \\frac{1}{d}\\sum_{j=1}^{d} (x_j - \\mu)^2 \\\\ y_i &= \\mathrm{rn}_{\\mathrm{bf16}}\\Bigl(\\frac{x_i - \\mu}{\\sqrt{v + \\epsilon}}\\,\\gamma_i + \\beta_i\\Bigr) \\end{aligned}"]},"rms_norm":{"description":"RMSNorm, fused residual copy / residual add + RMSNorm, strided per-head norm","about":"RMSNorm over rows $x \\in \\mathbb{R}^{d}$ with one block of up to 1024 threads per row: each thread squares BF16 pairs loaded as 32-bit words, the partial sums are reduced by a warp shuffle tree and then across warps through shared memory, and a second pass scales every element by the reciprocal root and the norm weight. rms_norm, rms_norm_strided (rows grouped along a second grid axis with a group stride, used for per-head q/k norms) and rms_norm_vanilla compute the norm alone; rms_norm_residual also copies the input row into the residual buffer; residual_add_rms_norm and residual_add_rms_norm_exact first add a branch output $s$ into the hidden row $h$ in place, then normalise it and copy it into the residual buffer, fusing one layer's residual add with the next layer's input norm. The weight is applied as $1+\\gamma$ (the one_plus point) in every kernel except rms_norm_vanilla, which applies the plain weight $\\gamma$.","numerics":"BF16 inputs are widened exactly to FP32; squares are accumulated per thread in FP32, reduced by a butterfly warp shuffle and a second shuffle over the per-warp sums, and the reciprocal root uses rsqrtf; the products are formed in FP32 and rounded once to BF16 (RNE) at the store. In residual_add_rms_norm the sum of squares uses the FP32 sums $h+s$ before their BF16 rounding while the normalised values are the rounded sums, whereas residual_add_rms_norm_exact squares the rounded sums, so it is bit-identical to the unfused add followed by rms_norm_residual.","math":["\\begin{aligned} r &= \\Bigl(\\frac{1}{d}\\sum_{j=1}^{d} x_j^2 + \\epsilon\\Bigr)^{-1/2} \\\\ y_i &= \\mathrm{rn}_{\\mathrm{bf16}}\\bigl(x_i \\, r \\, w_i\\bigr), \\qquad w_i = \\begin{cases} 1+\\gamma_i & \\text{one\\_plus} \\\\ \\gamma_i & \\text{plain} \\end{cases} \\end{aligned}","\\begin{aligned} h_i &\\leftarrow \\mathrm{rn}_{\\mathrm{bf16}}(h_i + s_i), \\qquad \\rho_i \\leftarrow h_i \\\\ r &= \\Bigl(\\frac{1}{d}\\sum_{j=1}^{d} u_j^2 + \\epsilon\\Bigr)^{-1/2}, \\qquad u_j = \\begin{cases} h_j + s_j \\ \\text{in FP32} & \\text{residual\\_add\\_rms\\_norm} \\\\ \\mathrm{rn}_{\\mathrm{bf16}}(h_j + s_j) & \\text{residual\\_add\\_rms\\_norm\\_exact} \\end{cases} \\\\ y_i &= \\mathrm{rn}_{\\mathrm{bf16}}\\bigl(h_i \\, r \\, (1+\\gamma_i)\\bigr) \\end{aligned}"]},"w4a16_gemv":{"description":"NVFP4 W4A16 CUDA-core GEMV: 1 row (sw, fused dual / q|gate / SiLU-input) and 2-3 row copies","about":"NVFP4-weight, BF16-activation GEMV on CUDA cores for 1 to 3 rows. The weight is E2M1 codes (two per byte, low nibble first) with one E4M3 scale per 16 values along K and one FP32 tensor scale, dequantized on the fly from a 16-entry E2M1 table staged in shared memory. w4a16_gemv gives each output 64 threads and four outputs per block, w4a16_gemv_sw one warp per output with the same operation order, and w4a16_gemv_batch2 and batch3 read each weight chunk once for 2 or 3 rows with each row bit-identical to the one-row kernel. The fused entries run two projections of one input in one launch (w4a16_gemv_dual, dual_sw, dual_batch2, dual_batch3), deinterleave a head-interleaved query and gate weight into a [Q | gate] output (w4a16_gemv_qg and its batch2 and batch3 forms), or take $\\operatorname{silu}(g)\\odot u$ as the input, computed per element (w4a16_gemv_silu_input_sw). w4a16_gemv_seg_r1, r2 and r4 run up to six weight segments that share the input row on one persistent grid (R output rows per warp tile, the input staged once per block), and w4a16_gemv_pipe_m1 and m2 do the same with each warp's weight loads issued one step ahead; both reproduce w4a16_gemv's bytes.","numerics":"The scale $s_{\\mathrm{g}}\\,s_{nj}$ is formed in FP32; the 16-value chunk walk accumulates each chunk with a fused multiply-add chain and folds it with one FMA by the chunk scale, while the 8-value walk (qg, dual, silu-input) multiplies the scale into every weight first; activations are widened BF16, the silu input stays in FP32, the warp shuffle tree and the two-warp sum are FP32, and the output is rounded once to BF16 with round-to-nearest-even.","math":["\\hat W_{nk} = s_{\\mathrm{g}}\\,s_{n,\\lfloor k/16 \\rfloor}\\,q_{nk}, \\qquad q_{nk} \\in \\{0, \\pm 0.5, \\pm 1, \\pm 1.5, \\pm 2, \\pm 3, \\pm 4, \\pm 6\\}, \\quad s_{nj} = \\mathrm{e4m3}(\\text{scale byte}), \\quad s_{\\mathrm{g}} \\in \\mathrm{fp32}, \\quad \\text{where } q \\text{ is the E2M1 value, } s_{nj} \\text{ the decoded E4M3 group scale and } s_{\\mathrm{g}} \\text{ the tensor scale}","\\begin{aligned} y_n &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\sum_{j=0}^{K/16-1} \\big(s_{\\mathrm{g}}\\,s_{nj}\\big) \\sum_{i=0}^{15} q_{n,16j+i}\\,x_{16j+i}\\Big) \\quad \\text{(16-value chunk walk)} \\\\ y_n &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\sum_{k=0}^{K-1} x_k \\big(q_{nk}\\,(s_{\\mathrm{g}}\\,s_{n,\\lfloor k/16 \\rfloor})\\big)\\Big) \\quad \\text{(8-value walk)} \\\\ x_k &= \\frac{g_k}{1 + e^{-g_k}}\\,u_k \\quad \\text{(silu input, FP32)} \\end{aligned}","y^{[Q\\,|\\,G]}_{\\pi(n)} = y_n, \\qquad \\pi(2dh + i) = \\begin{cases} dh + i & i < d \\\\ Hd + dh + (i - d) & i \\ge d \\end{cases} \\quad \\text{(qg: } H \\text{ heads of width } d\\text{)}"]},"w4a4_mx":{"description":"W4A4 MX GEMV (per-row NVFP4 activation quantize; mx8, the activation-reuse twins and the persistent entries)","about":"W4A4 GEMV for 1 to 32 rows on the Blackwell block-scaled FP4 MMA (m16n8k64, E2M1 x E2M1 with UE4M3 scales per 16 values): the checkpoint's NVFP4 weight bytes and E4M3 group scales are the MMA operands directly, so the weights are never dequantized. w4a4_quant_rows (one 256-thread CTA per row) quantizes each BF16 activation row to NVFP4 with a dynamic per-row global scale, writing codes and group scales in the MMA fragment order. The GEMVs put weights on the 16-row side and tokens on the 8-wide side; a 256-thread CTA owns a 16-row weight tile, warp $w$ takes the 128-wide K chunks $c \\equiv w \\pmod 8$ in increasing order with two MMAs per chunk, and the 8 warp partials are summed in warp order. w4a4_gemv_mx8 serves up to 8 rows; w4a4_gemv_mx16_nt2 and w4a4_gemv_mx32_nt4 keep their activation fragments in registers across 2 or 4 weight tiles; w4a4_gemv_mx16_ps and w4a4_gemv_mx32_ps are persistent forms with staged activations. Every variant is bit-identical per row to the one-tile kernel.","numerics":"Activation quantization in FP32: the row global scale is $\\max|x|/(6\\cdot 448)$ (1 for an all-zero row), each group scale is $\\max|x|/6$ times the reciprocal global scale rounded to nearest even and saturated to E4M3, and each value is $x/(s\\,g)$ rounded to nearest even onto the E2M1 grid, saturating at 6 (zero when the group scale is zero). The MMA chains its FP32 accumulator across a warp's chunks, the warp partials are added in FP32 in warp order, and the sum is multiplied by $g_t\\,s_{\\mathrm{g}}$ and rounded once to BF16.","math":["\\begin{aligned} g_t &= \\begin{cases} \\max_k |x_{tk}| \\,/\\, (6\\cdot 448) & \\max_k |x_{tk}| > 0 \\\\ 1 & \\text{otherwise} \\end{cases} \\\\ s^{a}_{tj} &= \\mathrm{sat}_{\\mathrm{e4m3}}\\Big(\\tfrac{1}{6}\\max_{i<16}|x_{t,16j+i}|\\cdot g_t^{-1}\\Big), \\qquad a_{tk} = \\mathrm{rn}_{\\mathrm{e2m1}}\\Big(\\frac{x_{tk}}{s^{a}_{t,\\lfloor k/16\\rfloor}\\,g_t}\\Big) \\end{aligned}","y_{tn} = \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\Big[\\sum_{w=0}^{7}\\;\\sum_{c \\equiv w \\pmod{8}}\\;\\sum_{k=128c}^{128c+127}\\big(q_{nk}\\,s^{w}_{n,\\lfloor k/16\\rfloor}\\big)\\big(a_{tk}\\,s^{a}_{t,\\lfloor k/16\\rfloor}\\big)\\Big]\\cdot\\big(g_t\\,s_{\\mathrm{g}}\\big)\\Big)","\\text{where } q, s^{w} \\text{ are the checkpoint E2M1 weight values and E4M3 group scales, } s_{\\mathrm{g}} \\text{ the FP32 weight tensor scale, and } \\mathrm{rn}_{\\mathrm{e2m1}} \\text{ rounds to nearest even on the E2M1 grid, saturating at } 6"]},"w4a4_mx_static":{"description":"W4A4 MX with static NVFP4 activation scales: static row quantize and the routed-expert slot GEMV","about":"W4A4 on the same block-scaled FP4 MMA core as w4a4_mx, for checkpoints that declare a static NVFP4 activation scale $\\gamma$ per projection, and its routed-expert forms. w4a4_quant_rows_static (and the _k64 twin, which pads rows to a multiple of 128) quantizes with the global scale fixed to $\\gamma$. w4a4_gemv_mx8_moe_slots runs the one-tile GEMV once per routed slot with that slot's expert weights; the union kernels (w4a4_gemv_mx8_moe_union, mx16_moe_union and their persistent _sweep forms, gate and up in one launch) sweep each expert of the rows' union once for every row that selected it, with w4a16_gemv::glm5next_moe_row_union building the union tables on the device. For prefill, w4a4_grouped_mx_m32, m64 and m128 run every routed slot in one launch over expert-sorted rows (weight tiles of 128 or 64 rows, 3- or 6-stage pipelines, after the tile-offset pass of w4a4_grouped_tiles or w4a4_grouped_one_group), and w4a4_grouped_gu_m32, m64 and m128 fuse gate, up, the clamped SwiGLU and the down input's static quantization into the epilogue. The _k64 variants accept K a multiple of 64, and the _cs variants read block scales stored as 5-bit offsets from a per-tensor base code that rebuild the same E4M3 codes; every variant writes the slot GEMV's bytes.","numerics":"As w4a4_mx, with $g = \\gamma$: group scales $\\max|x|/(6\\gamma)$ rounded to nearest even and saturated to E4M3 (so values beyond $6\\cdot 448\\,\\gamma$ saturate), E2M1 round-to-nearest-even saturating at 6, E2M1 x E2M1 block-scaled MMAs accumulating in FP32 in the slot GEMV's warp-class order, and one BF16 rounding of the sum times $\\gamma\\,s^{(e)}_{\\mathrm{g}}$ (the checkpoint's GEMM alpha). In the fused gate/up epilogue gate and up are first rounded to BF16, the clamped SwiGLU is evaluated in FP32 and rounded to BF16, and that value is quantized under the down projection's $\\gamma$.","math":["\\begin{aligned} s^{a}_{tj} &= \\mathrm{sat}_{\\mathrm{e4m3}}\\Big(\\tfrac{1}{6}\\max_{i<16}|x_{t,16j+i}|\\cdot\\gamma^{-1}\\Big), \\qquad a_{tk} = \\mathrm{rn}_{\\mathrm{e2m1}}\\Big(\\frac{x_{tk}}{s^{a}_{t,\\lfloor k/16\\rfloor}\\,\\gamma}\\Big) \\\\ y_{(t,r),n} &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\Big[\\sum_{w=0}^{7}\\;\\sum_{c \\equiv w \\pmod{8}}\\;\\sum_{k=128c}^{128c+127}\\big(q^{(e)}_{nk}\\,s^{w,(e)}_{n,\\lfloor k/16\\rfloor}\\big)\\big(a_{tk}\\,s^{a}_{t,\\lfloor k/16\\rfloor}\\big)\\Big]\\cdot\\big(\\gamma\\,s^{(e)}_{\\mathrm{g}}\\big)\\Big), \\quad e = \\mathrm{id}_{t,r} \\end{aligned}","h_{tk} = \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\operatorname{silu}\\big(\\min(\\tilde g_{tk}, L)\\big)\\cdot \\min\\big(\\max(\\tilde u_{tk}, -L), L\\big)\\Big), \\qquad \\tilde g = \\mathrm{rn}_{\\mathrm{bf16}}(\\text{gate}),\\; \\tilde u = \\mathrm{rn}_{\\mathrm{bf16}}(\\text{up}),\\; L = \\text{SwiGLU limit}","\\text{where } (t, r) \\text{ is routed slot } r \\text{ of token } t, \\; q^{(e)}, s^{w,(e)}, s^{(e)}_{\\mathrm{g}} \\text{ are the E2M1 values of expert } e \\text{, its E4M3 group scales and its FP32 tensor scale, and } \\gamma \\text{ is the static activation scale}"]},"w8a8_act_quant":{"description":"FP8 activation quantizer, dynamic per-token or per-128 (optionally SiLU * up first)","about":"Dynamic FP8 activation quantizer for the W8A8 decode projections, one 256-thread CTA per row. w8a8_act_quant_row produces one FP32 scale per token and w8a8_act_quant_g128 one per 128-wide K group (16 threads per group, reduced by xor shuffles); the per-token variant holds up to 18432 values of the row in registers so the row is read once. The silu variants (w8a8_act_quant_silu_row, w8a8_act_quant_silu_g128) first form $\\mathrm{rn}_{\\mathrm{bf16}}(\\operatorname{silu}(g)\\,u)$ from a gate row and an up row, writing the same bytes as SiLU-and-multiply followed by the plain quantizer.","numerics":"BF16 inputs are widened exactly to FP32; the SiLU product is $(g\\,\\sigma(g))\\,u$ with a fast exponential, left to right without FMA contraction, rounded to BF16. The absolute maximum is exact and order-independent; the scale is $\\max|x|/448$ by correctly rounded FP32 division, floored at $10^{-12}$ (an all-zero group encodes zeros), and each value is divided by the scale, clamped to $\\pm 448$ and converted to E4M3 with round-to-nearest-even and saturation.","math":["\\begin{aligned} v_{tk} &= x_{tk} \\quad \\text{or} \\quad v_{tk} = \\mathrm{rn}_{\\mathrm{bf16}}\\big((g_{tk}\\,\\sigma(g_{tk}))\\,u_{tk}\\big) \\\\ s_{t,G} &= \\max\\Big(\\max_{k \\in G} |v_{tk}| \\,/\\, 448,\\; 10^{-12}\\Big), \\qquad G = [0, K) \\text{ (row) or } [128b, 128b+128) \\text{ (g128)} \\\\ q_{tk} &= \\mathrm{sat}_{\\mathrm{e4m3}}\\Big(\\min\\big(\\max(v_{tk}/s_{t,G}, -448), 448\\big)\\Big) \\end{aligned}"]},"wxay":{"description":"WxAy policy engine: tensor-core GEMV for M <= 128, row-invariant","about":"The WxAy skinny tensor-core engine for W8A8 decode projections of 1 to 128 rows: E4M3 weights times E4M3 activations on m16n8k32 FP8 MMAs, with the format handled by a policy. The rowscale policy pairs per-output-channel weight scales with per-token activation scales; the blk128 policy pairs 128 x 128 weight block scales with per-128 activation group scales, folded per chunk. A 256-thread CTA owns 16 weight rows (the MMA's 16-row side) and MB token tiles of 8 (mb1 to mb16 cover up to 8 to 128 rows); K is cut into 128-value chunks, chunk $c$ belongs to warp $c \\bmod 8$ for every row count and is multiplied in increasing order, and the 8 warp partials are summed in warp order, so a token's result is independent of how many tokens share the launch. Up to three stacked weight segments (for example Q, K and V) are read in place into one output, and w8a8_gemv_rowscale_mb1_ku8_split4 writes up to four projections of one input to separate outputs with the same bytes.","numerics":"E4M3 x E4M3 products accumulate in FP32 inside the MMA. Rowscale: chunk sums chain in the warp's FP32 accumulator, the warp partials are added, and the sum is multiplied by $w_n\\,a_t$ before one BF16 rounding. Blk128: each chunk's FP32 MMA sum is folded with one fused multiply-add by the FP32 product of its weight and activation scales, then the warp partials are added and rounded once to BF16 (round-to-nearest-even).","math":["\\begin{aligned} S_{c,tn} &= \\sum_{k=128c}^{128c+127} \\mathrm{e4m3}(A_{tk})\\,\\mathrm{e4m3}(W_{nk}) \\\\ y_{tn} &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\Big[\\sum_{w=0}^{7}\\;\\sum_{c \\equiv w \\pmod{8}} S_{c,tn}\\Big]\\cdot\\big(w_n\\,a_t\\big)\\Big) \\quad \\text{(rowscale)} \\\\ y_{tn} &= \\mathrm{rn}_{\\mathrm{bf16}}\\Big(\\sum_{w=0}^{7}\\;\\sum_{c \\equiv w \\pmod{8}} S_{c,tn}\\cdot\\big(w_{\\lfloor n/128\\rfloor,c}\\,a_{t,c}\\big)\\Big) \\quad \\text{(blk128)} \\end{aligned}","\\text{where } w_n, a_t \\text{ are the per-channel weight and per-token activation scales, and } w_{\\lfloor n/128\\rfloor,c}, a_{t,c} \\text{ the block-128 weight and group-128 activation scales (all FP32)}"]}},"formats":{"bf16":{"title":"BF16 (bfloat16)","description":"16 bits: 1 sign, 8 exponent and 7 mantissa bits. The exponent range of FP32 with 8 significant bits; the engine's activation and residual format.","math":["x = (-1)^{s}\\,2^{e-127}\\left(1+\\tfrac{m}{2^{7}}\\right),\\quad e \\in [1, 254],\\ m \\in [0, 127]"],"encode":"x_{\\mathrm{bf16}} = \\mathrm{rn}_{\\mathrm{bf16}}(x),\\ \\text{round to nearest, ties to even, of the top 16 bits of the FP32 value}"},"f32":{"title":"FP32 (IEEE 754 binary32)","description":"32 bits: 1 sign, 8 exponent and 23 mantissa bits. Accumulators, gate values, recurrent state and logits that must not lose precision between kernels.","math":["x = (-1)^{s}\\,2^{e-127}\\left(1+\\tfrac{m}{2^{23}}\\right)"],"encode":null},"fp8/channel":{"title":"FP8 E4M3, one FP32 scale per output channel","description":"8 bits per value: 1 sign, 4 exponent (bias 7) and 3 mantissa bits, finite only (largest magnitude 448), with one FP32 scale per output channel. A value is the stored code times its scale.","math":["q = (-1)^{s}\\,2^{e-7}\\left(1+\\tfrac{m}{8}\\right),\\quad |q| \\le 448","\\hat{x}_{rj} = s_{j}\\,q_{rj}"],"encode":"s_{j} = \\max\\!\\left(\\frac{\\max_{r}|x_{rj}|}{448},\\,10^{-12}\\right),\\qquad q_{rj} = \\mathrm{sat}_{\\mathrm{e4m3}}\\!\\left(\\frac{x_{rj}}{s_{j}}\\right)"},"fp8/token":{"title":"FP8 E4M3, one FP32 scale per row (token)","description":"8 bits per value: 1 sign, 4 exponent (bias 7) and 3 mantissa bits, finite only (largest magnitude 448), with one FP32 scale per row (token). A value is the stored code times its scale.","math":["q = (-1)^{s}\\,2^{e-7}\\left(1+\\tfrac{m}{8}\\right),\\quad |q| \\le 448","\\hat{x}_{rj} = s_{r}\\,q_{rj}"],"encode":"s_{r} = \\max\\!\\left(\\frac{\\max_{j}|x_{rj}|}{448},\\,10^{-12}\\right),\\qquad q_{rj} = \\mathrm{sat}_{\\mathrm{e4m3}}\\!\\left(\\frac{x_{rj}}{s_{r}}\\right)"},"i32":{"title":"INT32","description":"32-bit signed integers: token ids, expert ids and selected indices, never arithmetic values.","math":["t \\in \\{0, 1, \\dots, 2^{31}-1\\}"],"encode":null},"nvfp4/g16":{"title":"NVFP4, E2M1 with an E4M3 scale per 16","description":"4 bits per value (E2M1: 1 sign, 2 exponent, 1 mantissa bit), packed two per byte, one E4M3 scale byte per 16 consecutive values and one FP32 global scale (per tensor for a weight, per row for an activation).","math":["q \\in \\{0,\\ \\pm 0.5,\\ \\pm 1,\\ \\pm 1.5,\\ \\pm 2,\\ \\pm 3,\\ \\pm 4,\\ \\pm 6\\}","\\hat{x}_{j} = \\alpha\\; s_{\\lfloor j/16 \\rfloor}\\; q_{j},\\qquad s_{b} \\in \\mathrm{E4M3},\\ \\alpha \\in \\mathrm{FP32}"],"encode":"\\alpha = \\frac{\\max_{j}|x_{j}|}{6 \\cdot 448},\\qquad s_{b} = \\mathrm{sat}_{\\mathrm{e4m3}}\\!\\left(\\frac{\\max_{j \\in b}|x_{j}|}{6\\,\\alpha}\\right),\\qquad q_{j} = \\mathrm{rn}_{\\mathrm{e2m1}}\\!\\left(\\frac{x_{j}}{\\alpha\\, s_{\\lfloor j/16 \\rfloor}}\\right)"}}},"provenance":{"kind":"preview","engine_commit":"b604fd98d239c96a7b9a8d24f6d57fb7ef378611","planner_sha256":"7868f0ba0b76e82e84446d981859af815def9dad984d67fddfb18086153834d6","planner_built_from":"b604fd98d239c96a7b9a8d24f6d57fb7ef378611","planner_header":{"recipe":"glm-5.3/glm-5.3-flash-nvfp4-tp3-512k","checkpoint":"nvidia/GLM-5.3-Flash-NVFP4","target":"gb10/glm-5.3-flash/nvfp4","settings":"activation_quantization=adaptive decode_split_silu=on gemv_sw=on glm_kda_row_reg=on glm_kda_rows_reg=on glm_kda_seq_rows=decode glm_kda_verify_tokens=on glm_mhc_fused=on glm_moe_expert_layout=tp glm_moe_w4a4_grouped=on glm_router_rows=on glm_router_topk_rank=on glm_w4a16_gemv_rows=2 glm_w4a16_gemv_seg=on glm_w4a16_seg=fuse kv_cache_dtype=fp8 lm_head_dtype=bf16 rms_norm_act_quant=off row_tiers=by_rows ssm_ba_gates_hopper=on ssm_batched_recurrent=on ssm_h_dtype=f32 w4a16_tc=on","opt-in levers":"none"},"commands":["met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode decode --rows 1","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 2","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 4","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 8","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 12","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 16","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 24","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 32","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 48","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 64","met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 96","met 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